In the realm of millimeter wave frequencies, the design of systems operating in those frequencies on the order of 50 GHz poses a number of challenges. In addressing the challenges, embedded wafer-level ball grid array (eWLB) packaging technology may be used for millimeter wave systems operating above ˜50 GHz for low-cost mass production.
Parasitic capacitance introduced by the I/O pads on the silicon significantly reduces the performance of the IC-to-Package interconnect at millimeter wave frequencies.
There exists a need for a packaging technique that minimizes the effects of parasitic capacitance of IO pads used for signals at millimeter wave frequencies.